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<math display="block">\text{FREQREG} = \frac{f_{OUT}\times 2^{28}}{f_{MCLK}}</math>
where <math>f_{OUT}</math> is the desired output frequency of the AD9833 and <math>f_{MCLK}</math> is the frequency of the master clock signal input provided by a clock driver. For example, to program an output frequency of 20.5kHz using a 6MHz master clock signal:
<math display="block">\text{FREQREG} = \frac{20500\times 2^{28}}{6\times10^6} = DFEA2_{16}=11011111111010100010_{2}</math>
